Triple module redundancy scheme on an optically reconfigurable gate array

Yuki Torigai, Minoru Watanabe

研究成果

抄録

Demand for programmable devices for space applications is increasing day by day to support hardware repair functions, hardware update functions, and hardware acceleration for space systems To meet those needs, one candidate is an optically reconfigurable gate array (ORGA) because the ORGA can be reconfigured with invalid configuration data that are damaged by high-energy charged particles in a radiation-rich space environment. The amount of configuration data damage that can be sustained by ORGAs is greater than that by FPGAs with error checking and correction (ECC). An ORGA is therefore extremely robust in terms of its configuration data. Moreover, the ORGA's programmable gate array is reconfigurable at nanosecond order, with more than 100 reconfiguration contexts. For that reason, high-speed repair and update are possible. However, an ORGA's programmable gate array itself is never as robust against space radiation as that of an application-specific integrated circuit (ASIC) because the gate array's programmable architecture is identical to that of an FPGA. Therefore, this paper presents a proposal of a triple module redundancy scheme on an ORGA to achieve the same robust ability as that of ASICs.

本文言語English
ホスト出版物のタイトル2011 International SoC Design Conference, ISOCC 2011
ページ250-253
ページ数4
出版ステータスPublished - 2011
外部発表はい
イベント8th International SoC Design Conference 2011, ISOCC 2011 - Jeju
継続期間: 11月 17 201111月 18 2011

出版物シリーズ

名前2011 International SoC Design Conference, ISOCC 2011

Conference

Conference8th International SoC Design Conference 2011, ISOCC 2011
国/地域Korea, Republic of
CityJeju
Period11/17/1111/18/11

ASJC Scopus subject areas

  • ハードウェアとアーキテクチャ
  • 電子工学および電気工学

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