A design guideline of parasitic inductance for preventing oscillatory false triggering of fast switching GaN-FET

Gallium nitride field-effect transistors (GaN-FETs) are attractive devices because of its low on-state resistance and fast switching capability. However, they can suffer from false triggering caused by fast switching. Particularly, a disastrous oscillation of repetitive false triggering can occur after a turn-off, which may deteriorate the reliability of power converters. To address this issue, we give a design guideline to prevent this phenomenon. We analyze a simple circuit model to derive the condition of occurrence of this phenomenon, which is then verified experimentally. Results show that the parasitic inductance of the gating circuit, L_g, and that of the decoupling circuit, L_d, should be designed so that the LC resonance frequency of L_g and the gate–source capacitance of the GaN-FET does not coincide with that of L_d and the drain–source capacitance, respectively.