Testing for the programming circuit of SRAM-based FPGAs

Hiroyuki Michinishi, Tokumi Yokohira, Takuji Okamotq, Tomoo Inoue, Hideo Fujiwara

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

The programming circuit of SRAM-based FPGAs consists of two shift registers, a control circuit and a configuration memory (SRAM) cell array. Because the configuration memory cell array can be easily tested by conventional test methods for RAMs, we focus on testing for the shift registers. We first derive test procedures for the shift registers, which can be done by using only the faculties of the programming circuit, without using additional hardware. Next, we show the validness of the test procedures. Finally, we show an application of the test procedures to test Xilinx XC-1025.

Original languageEnglish
Pages (from-to)1051-1057
Number of pages7
JournalIEICE Transactions on Information and Systems
VolumeE82-D
Issue number6
Publication statusPublished - 1999

Keywords

  • Configuration
  • Fault detection
  • Functional fault
  • Lut-bascd fpga
  • Sram-based fpga

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Computer Vision and Pattern Recognition
  • Electrical and Electronic Engineering
  • Artificial Intelligence

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  • Cite this

    Michinishi, H., Yokohira, T., Okamotq, T., Inoue, T., & Fujiwara, H. (1999). Testing for the programming circuit of SRAM-based FPGAs. IEICE Transactions on Information and Systems, E82-D(6), 1051-1057.