Solving satisfiability problems on FPGAs using experimental unit propagation heuristic

Takayuki Suyama, Makoto Yokoo, Akira Nagoya

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

This paper presents new results on an approach for solving satisfiability problems (SAT), that is, creating a logic circuit that is specialized to solve each problem instance on Field Programmable Gate Arrays (FPGAs). This approach has become feasible due to recent advances in Reconfigurable Computing. We develop an algorithm that is suitable for a logic circuit implementation. This algorithm is basically equivalent to the Davis-Putnam procedure with Experimental Unit Propagation. The required hardware resources for the algorithm are less than those of MOM’s heuristics.

Original languageEnglish
Title of host publicationParallel and Distributed Processing - 11 th IPPS/SPDP 1999 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, Proceedings
EditorsJosé Rolim
PublisherSpringer Verlag
Pages709-711
Number of pages3
ISBN (Print)3540658319, 9783540658313
DOIs
Publication statusPublished - Jan 1 1999
Externally publishedYes
Event13th International Parallel Processing Symposium, IPPS 1999 Held in Conjunction with the 10th Symposium on Parallel and Distributed Processing, SPDP 1999 - San Juan, United States
Duration: Apr 12 1999Apr 16 1999

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume1586
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Other

Other13th International Parallel Processing Symposium, IPPS 1999 Held in Conjunction with the 10th Symposium on Parallel and Distributed Processing, SPDP 1999
CountryUnited States
CitySan Juan
Period4/12/994/16/99

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)

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  • Cite this

    Suyama, T., Yokoo, M., & Nagoya, A. (1999). Solving satisfiability problems on FPGAs using experimental unit propagation heuristic. In J. Rolim (Ed.), Parallel and Distributed Processing - 11 th IPPS/SPDP 1999 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, Proceedings (pp. 709-711). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 1586). Springer Verlag. https://doi.org/10.1007/BFb0097959