Sequential circuit implementation method for multi-context scrubbing operations on FPGAS

Kurea Murakami, Minoru Watanabe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a proposal for a sequential circuit implementation method for multi-context scrubbing operations that can treat soft-error and permanent failure issues simultaneously. Although multi-context scrubbing operations can treat permanent failure issues on field programmable gate arrays (FPGAs), implementing sequential circuits is difficult because the flip-flop location must be changed while maintaining sequential operations. Therefore, no multi-context scrubbing operation including a sequential circuit has been demonstrated to date. As described herein, a multi-context scrubbing operation using a simple 8-bit counter circuit has been demonstrated perfectly on an Artix-7 FPGA (XC7A35TICSG324-1L). This paper presents experimentally obtained results of that demonstration.

Original languageEnglish
Title of host publication2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728192017
DOIs
Publication statusPublished - 2021
Externally publishedYes
Event53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Daegu, Korea, Republic of
Duration: May 22 2021May 28 2021

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2021-May
ISSN (Print)0271-4310

Conference

Conference53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
Country/TerritoryKorea, Republic of
CityDaegu
Period5/22/215/28/21

Keywords

  • Field programmable gate array (FPGA)
  • Multi-context scrubbing
  • Partial reconfiguration
  • Scrubbing operation
  • Space environment

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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