Optimization of the balance between the gate-Drain capacitance and the common source inductance for preventing the oscillatory false triggering of fast switching GaN- FETs

Rynosuke Matsumoto, Kazuhiro Umetani, Eiji Hiraki

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

GaN- FETs are attractive switching devices for their fast switching capability. However, they often suffer from the oscillatory false triggering, i.e. a series of self-sustaining repetitive false triggering induced after a fast switching. The purpose of this paper is to derive a design instruction to prevent this phenomenon. According to the previous study, the oscillatory false triggering was found to be caused by a parasitic oscillator circuit formed of a GaN- FET, its parasitic capacitance, and the parasitic inductance of the wiring. This paper analyzed the oscillatory condition to elucidate the design requirement to prevent the oscillatory false triggering. As a result, balancing the gate-drain parasitic capacitance and the common source inductance to achieve an appropriate ratio was found to be essential for preventing the oscillatory false triggering. Experiment successfully supported prevention of this phenomenon by balancing these two factors.

Original languageEnglish
Title of host publication2017 IEEE Energy Conversion Congress and Exposition, ECCE 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages405-412
Number of pages8
Volume2017-January
ISBN (Electronic)9781509029983
DOIs
Publication statusPublished - Nov 3 2017
Event9th Annual IEEE Energy Conversion Congress and Exposition, ECCE 2017 - Cincinnati, United States
Duration: Oct 1 2017Oct 5 2017

Other

Other9th Annual IEEE Energy Conversion Congress and Exposition, ECCE 2017
CountryUnited States
CityCincinnati
Period10/1/1710/5/17

    Fingerprint

Keywords

  • common source inductance
  • False triggering
  • GaN- FET
  • Oscillatory condition
  • Switching

ASJC Scopus subject areas

  • Energy Engineering and Power Technology
  • Electrical and Electronic Engineering
  • Renewable Energy, Sustainability and the Environment
  • Control and Optimization

Cite this

Matsumoto, R., Umetani, K., & Hiraki, E. (2017). Optimization of the balance between the gate-Drain capacitance and the common source inductance for preventing the oscillatory false triggering of fast switching GaN- FETs. In 2017 IEEE Energy Conversion Congress and Exposition, ECCE 2017 (Vol. 2017-January, pp. 405-412). [8095811] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ECCE.2017.8095811