Optimal resistance determination method for RL damper circuits in power distribution network of ICs

Ryosuke Yamagata, Kengo Iokibe, Yoshitaka Toyota

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We investigated a method using parallel RL circuits inserted into power distribution network (PDN) of integrated circuits (ICs) to enhance the IC in EMI and PI performance. Optimal damping resistances of the parallel RL circuit were derived from a characteristic equation of an equivalent circuit of a partial PDN that contributed to PDN resonances dominantly. The parallel RL circuit with the optimal resistances damps the PDN resonances as quickly as possible and reduces peaks in simultaneous switching current that will cause EMI and in input impedance of PDN related to PI. We validated the parallel RL circuit with respect to EMI and PI performance of ICs numerically and experimentally. Results of these validation showed that the proposed method descend the simultaneous switching current at both chip-package-board and on-board resonant frequency. It is also confirmed that insertion of the parallel RL circuits into the power trace reduced the impedance peak due to the chip-package-board resonance.

Original languageEnglish
Title of host publicationProceedings - 2012 6th Asia-Pacific Conference on Environmental Electromagnetics, CEEM 2012
Pages222-225
Number of pages4
DOIs
Publication statusPublished - 2012
Event2012 6th Asia-Pacific Conference on Environmental Electromagnetics, CEEM 2012 - Shanghai, China
Duration: Nov 6 2012Nov 9 2012

Other

Other2012 6th Asia-Pacific Conference on Environmental Electromagnetics, CEEM 2012
CountryChina
CityShanghai
Period11/6/1211/9/12

Fingerprint

Electric power distribution
Integrated circuits
Networks (circuits)
Equivalent circuits
Natural frequencies
Damping

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Environmental Engineering

Cite this

Yamagata, R., Iokibe, K., & Toyota, Y. (2012). Optimal resistance determination method for RL damper circuits in power distribution network of ICs. In Proceedings - 2012 6th Asia-Pacific Conference on Environmental Electromagnetics, CEEM 2012 (pp. 222-225). [6410607] https://doi.org/10.1109/CEEM.2012.6410607

Optimal resistance determination method for RL damper circuits in power distribution network of ICs. / Yamagata, Ryosuke; Iokibe, Kengo; Toyota, Yoshitaka.

Proceedings - 2012 6th Asia-Pacific Conference on Environmental Electromagnetics, CEEM 2012. 2012. p. 222-225 6410607.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Yamagata, R, Iokibe, K & Toyota, Y 2012, Optimal resistance determination method for RL damper circuits in power distribution network of ICs. in Proceedings - 2012 6th Asia-Pacific Conference on Environmental Electromagnetics, CEEM 2012., 6410607, pp. 222-225, 2012 6th Asia-Pacific Conference on Environmental Electromagnetics, CEEM 2012, Shanghai, China, 11/6/12. https://doi.org/10.1109/CEEM.2012.6410607
Yamagata R, Iokibe K, Toyota Y. Optimal resistance determination method for RL damper circuits in power distribution network of ICs. In Proceedings - 2012 6th Asia-Pacific Conference on Environmental Electromagnetics, CEEM 2012. 2012. p. 222-225. 6410607 https://doi.org/10.1109/CEEM.2012.6410607
Yamagata, Ryosuke ; Iokibe, Kengo ; Toyota, Yoshitaka. / Optimal resistance determination method for RL damper circuits in power distribution network of ICs. Proceedings - 2012 6th Asia-Pacific Conference on Environmental Electromagnetics, CEEM 2012. 2012. pp. 222-225
@inproceedings{77c3e3f59d76472198f6cedb42ed0b1b,
title = "Optimal resistance determination method for RL damper circuits in power distribution network of ICs",
abstract = "We investigated a method using parallel RL circuits inserted into power distribution network (PDN) of integrated circuits (ICs) to enhance the IC in EMI and PI performance. Optimal damping resistances of the parallel RL circuit were derived from a characteristic equation of an equivalent circuit of a partial PDN that contributed to PDN resonances dominantly. The parallel RL circuit with the optimal resistances damps the PDN resonances as quickly as possible and reduces peaks in simultaneous switching current that will cause EMI and in input impedance of PDN related to PI. We validated the parallel RL circuit with respect to EMI and PI performance of ICs numerically and experimentally. Results of these validation showed that the proposed method descend the simultaneous switching current at both chip-package-board and on-board resonant frequency. It is also confirmed that insertion of the parallel RL circuits into the power trace reduced the impedance peak due to the chip-package-board resonance.",
author = "Ryosuke Yamagata and Kengo Iokibe and Yoshitaka Toyota",
year = "2012",
doi = "10.1109/CEEM.2012.6410607",
language = "English",
isbn = "9781467300308",
pages = "222--225",
booktitle = "Proceedings - 2012 6th Asia-Pacific Conference on Environmental Electromagnetics, CEEM 2012",

}

TY - GEN

T1 - Optimal resistance determination method for RL damper circuits in power distribution network of ICs

AU - Yamagata, Ryosuke

AU - Iokibe, Kengo

AU - Toyota, Yoshitaka

PY - 2012

Y1 - 2012

N2 - We investigated a method using parallel RL circuits inserted into power distribution network (PDN) of integrated circuits (ICs) to enhance the IC in EMI and PI performance. Optimal damping resistances of the parallel RL circuit were derived from a characteristic equation of an equivalent circuit of a partial PDN that contributed to PDN resonances dominantly. The parallel RL circuit with the optimal resistances damps the PDN resonances as quickly as possible and reduces peaks in simultaneous switching current that will cause EMI and in input impedance of PDN related to PI. We validated the parallel RL circuit with respect to EMI and PI performance of ICs numerically and experimentally. Results of these validation showed that the proposed method descend the simultaneous switching current at both chip-package-board and on-board resonant frequency. It is also confirmed that insertion of the parallel RL circuits into the power trace reduced the impedance peak due to the chip-package-board resonance.

AB - We investigated a method using parallel RL circuits inserted into power distribution network (PDN) of integrated circuits (ICs) to enhance the IC in EMI and PI performance. Optimal damping resistances of the parallel RL circuit were derived from a characteristic equation of an equivalent circuit of a partial PDN that contributed to PDN resonances dominantly. The parallel RL circuit with the optimal resistances damps the PDN resonances as quickly as possible and reduces peaks in simultaneous switching current that will cause EMI and in input impedance of PDN related to PI. We validated the parallel RL circuit with respect to EMI and PI performance of ICs numerically and experimentally. Results of these validation showed that the proposed method descend the simultaneous switching current at both chip-package-board and on-board resonant frequency. It is also confirmed that insertion of the parallel RL circuits into the power trace reduced the impedance peak due to the chip-package-board resonance.

UR - http://www.scopus.com/inward/record.url?scp=84874342732&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84874342732&partnerID=8YFLogxK

U2 - 10.1109/CEEM.2012.6410607

DO - 10.1109/CEEM.2012.6410607

M3 - Conference contribution

AN - SCOPUS:84874342732

SN - 9781467300308

SP - 222

EP - 225

BT - Proceedings - 2012 6th Asia-Pacific Conference on Environmental Electromagnetics, CEEM 2012

ER -