Insertion of parallel RL circuits into power distribution network for simultaneous switching current reduction and power integrity

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

We investigated a method using parallel RL circuits inserted into power distribution network (PDN) of integrated circuits (ICs) to enhance the IC in EMI and PI performance. Optimal damping resistances of the parallel RL circuit were derived from a characteristic equation of an equivalent circuit of a partial PDN that contributed to PDN resonances dominantly. The parallel RL circuit with the optimal resistances damps the PDN resonances as quickly as possible and reduces peaks in simultaneous switching current that will cause EMI and in input impedance of PDN related to PI. We validated the parallel RL circuit with respect to EMI and PI performance of ICs numerically and experimentally. Results of these validation showed that the proposed method descend the simultaneous switching current at both chip-package-board and on-board resonant frequency. It is also confirmed that insertion of the parallel RL circuits into the power trace reduced the impedance peak due to the chip-package-board resonance.

Original languageEnglish
Title of host publication2012 Asia-Pacific Symposium on Electromagnetic Compatibility, APEMC 2012 - Proceedings
Pages417-420
Number of pages4
DOIs
Publication statusPublished - Aug 15 2012
Event2012 Asia-Pacific Symposium on Electromagnetic Compatibility, APEMC 2012 - Singapore, Singapore
Duration: May 21 2012May 24 2012

Publication series

Namecccc2012 Asia-Pacific Symposium on Electromagnetic Compatibility, APEMC 2012 - Proceedings

Other

Other2012 Asia-Pacific Symposium on Electromagnetic Compatibility, APEMC 2012
CountrySingapore
CitySingapore
Period5/21/125/24/12

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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    Iokibe, K., Yano, Y., & Toyota, Y. (2012). Insertion of parallel RL circuits into power distribution network for simultaneous switching current reduction and power integrity. In 2012 Asia-Pacific Symposium on Electromagnetic Compatibility, APEMC 2012 - Proceedings (pp. 417-420). [6237943] (cccc2012 Asia-Pacific Symposium on Electromagnetic Compatibility, APEMC 2012 - Proceedings). https://doi.org/10.1109/APEMC.2012.6237943