Image recognition operation on a dynamically reconfigurable vison architecture

Yuki Kamikubo, Minoru Watanabe, Shoji Kawahito

Research output: Contribution to conferencePaperpeer-review

Abstract

Recently, for use in autonomous vehicles and robots, demand has been increasing for high-speed image recognition that is superior to that of the human eye. However, to recognize numerous images quickly, such systems require many template images to be read out dynamically from memory. They must then be sent to a processor quickly. Achieving such high-speed real-time image recognition operation is difficult because of the bottleneck of the transfer between the memory and the processor. To alleviate that bottleneck, a dynamically reconfigurable vision architecture was proposed. This paper presents 16-gray scale image recognition operation of the proposed architecture.

Original languageEnglish
DOIs
Publication statusPublished - 2013
Externally publishedYes
Event2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Porto, Portugal
Duration: Sep 2 2013Sep 4 2013

Conference

Conference2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013
Country/TerritoryPortugal
CityPorto
Period9/2/139/4/13

Keywords

  • Dynamically re-configurable devices
  • Field Programmable Gate Arrays
  • Vision chips

ASJC Scopus subject areas

  • Computational Theory and Mathematics
  • Applied Mathematics

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