Hybrid Montgomery reduction

Hwajeong Seo; Zhe Liu; Yasuyuki Nogami; Jongseok Choi; Howon Kim

doi:10.1145/2890502

Hybrid Montgomery reduction

Hwajeong Seo, Zhe Liu, Yasuyuki Nogami, Jongseok Choi, Howon Kim

Research output: Contribution to journal › Article

3 Citations (Scopus)

Abstract

In this article, we present a hybrid method to improve the performance of the Montgomery reduction by taking advantage of the Karatsuba technique. We divide the Montgomery reduction into two sub-parts, including one for the conventional Montgomery reduction and the other one for Karatsuba-aided multiplication. This approach reduces the multiplication complexity of n-limb Montgomery reduction from θ(n² + n) to asymptotic complexity θ(7n²/8 + n). Our practical implementation results over an 8-bit microcontroller also show performance enhancements by 11%.

Original language	English
Article number	58
Journal	Transactions on Embedded Computing Systems
Volume	15
Issue number	3
DOIs	https://doi.org/10.1145/2890502
Publication status	Published - May 1 2016

Keywords

Karatsuba multiplication
Montgomery reduction
Public key cryptography
Software implementation

ASJC Scopus subject areas

Hardware and Architecture
Software

Access to Document

10.1145/2890502

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Cite this

Seo, H., Liu, Z., Nogami, Y., Choi, J., & Kim, H. (2016). Hybrid Montgomery reduction. Transactions on Embedded Computing Systems, 15(3), [58]. https://doi.org/10.1145/2890502

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