FPGA Blokus Duo Solver using a massively parallel architecture

Takashi Yoza, Retsu Moriwaki, Yuki Torigai, Yuki Kamikubo, Takayuki Kubota, Takahiro Watanabe, Takumi Fujimori, Hiroyuki Ito, Masato Seo, Kouta Akagi, Yuichiro Yamaji, Minoru Watanabe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

Recently, many game programs have been developed aggressively as hardware on field programmable gate arrays (FPGAs) because of the extremely large solution space of such games as the Connecta game, Blokus Duo game, and others so that the computational capabilities of computers are currently insufficient to search all possible solutions. This report describes an FPGA acceleration experiment for the Blokus Duo game. The FPGA Blokus Duo Solver was implemented on an Arria Π GX FPGA (Altera Corp.). Its operation speed is 25 times faster than C++ based software operation of the same algorithm on a Core i7 processor.

Original languageEnglish
Title of host publicationFPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology
Pages494-497
Number of pages4
DOIs
Publication statusPublished - 2013
Externally publishedYes
Event2013 12th International Conference on Field-Programmable Technology, FPT 2013 - Kyoto, Japan
Duration: Dec 9 2013Dec 11 2013

Publication series

NameFPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology

Conference

Conference2013 12th International Conference on Field-Programmable Technology, FPT 2013
Country/TerritoryJapan
CityKyoto
Period12/9/1312/11/13

ASJC Scopus subject areas

  • Software

Fingerprint

Dive into the research topics of 'FPGA Blokus Duo Solver using a massively parallel architecture'. Together they form a unique fingerprint.

Cite this