Fast optical reconfiguration of a nine-context DORGA using a speed adjustment control

Mao Nakajima, Minoru Watanabe

Research output: Contribution to journalArticlepeer-review

25 Citations (Scopus)

Abstract

Demand for fast dynamic reconfiguration has increased since dynamic reconfiguration can accelerate the performance of implementation circuits. Such dynamic reconfiguration requires two important features: fast reconfiguration and numerous reconfiguration contexts. However, fast reconfiguration and numerous reconfiguration contexts share a trade-off relation on current VLSIs. Therefore, Optically Reconfigurable Gate Arrays (ORGAs) have been developed to resolve this dilemma. An ORGA architecture allows many configuration contexts by exploiting the large storage capacity of a holographic memory and fast reconfiguration using wide-bandwidth optical connections between a holographic memory and a programmable gate array VLSI. In addition, Dynamic Optically Reconfigurable Gate Arrays (DORGAs) using a photodiode memory architecture have already been developed to realize a high-gate-density VLSI. Therefore, this article presents the first demonstration of a nanosecond-order configuration of a nine-context DORGA architecture. Moreover, this article presents a proposal of a reconfiguration period adjustment technique to control each reconfiguration period to its best setting.

Original languageEnglish
Article number15
JournalACM Transactions on Reconfigurable Technology and Systems
Volume4
Issue number2
DOIs
Publication statusPublished - May 2011
Externally publishedYes

Keywords

  • Field programmable gate arrays
  • Holographic memory
  • Optically reconfigurable gate arrays

ASJC Scopus subject areas

  • Computer Science(all)

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