Fabrication method for IC-oriented Si twin-island single-electron transistors

Yukinori Ono; Yasuo Takahashi; Kenji Yamazaki; Masao Nagase; Hideo Namatsu; Kenji Kurihara; Katsumi Murase

Fabrication method for IC-oriented Si twin-island single-electron transistors

Yukinori Ono, Yasuo Takahashi, Kenji Yamazaki, Masao Nagase, Hideo Namatsu, Kenji Kurihara, Katsumi Murase

Faculty of Engineering

Research output: Contribution to journal › Conference article › peer-review

8 Citations (Scopus)

Abstract

A new fabrication method for Si single-electron transistors (SETs) is proposed. The method enables us to fabricate, in a self-aligned way, a twin-island SET in which two Si islands are aligned in parallel. Experimental devices demonstrated, at 40 K, that the twin-island SET structure can be operated as two individual SETs. Since the two SETs are packed in a tiny area, this method is suitable for constructing logic circuits based on pass-transistor-type logic and CMOS-type logic, which promises to lead to single-electron logic LSIs.

Original language	English
Pages (from-to)	123-126
Number of pages	4
Journal	Technical Digest - International Electron Devices Meeting
Publication status	Published - Dec 1 1998
Event	Proceedings of the 1998 IEEE International Electron Devices Meeting - San Francisco, CA, USA Duration: Dec 6 1998 → Dec 9 1998

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

Cite this

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title = "Fabrication method for IC-oriented Si twin-island single-electron transistors",

abstract = "A new fabrication method for Si single-electron transistors (SETs) is proposed. The method enables us to fabricate, in a self-aligned way, a twin-island SET in which two Si islands are aligned in parallel. Experimental devices demonstrated, at 40 K, that the twin-island SET structure can be operated as two individual SETs. Since the two SETs are packed in a tiny area, this method is suitable for constructing logic circuits based on pass-transistor-type logic and CMOS-type logic, which promises to lead to single-electron logic LSIs.",

author = "Yukinori Ono and Yasuo Takahashi and Kenji Yamazaki and Masao Nagase and Hideo Namatsu and Kenji Kurihara and Katsumi Murase",

year = "1998",

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journal = "Technical Digest - International Electron Devices Meeting",

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note = "Proceedings of the 1998 IEEE International Electron Devices Meeting ; Conference date: 06-12-1998 Through 09-12-1998",

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TY - JOUR

T1 - Fabrication method for IC-oriented Si twin-island single-electron transistors

AU - Ono, Yukinori

AU - Takahashi, Yasuo

AU - Yamazaki, Kenji

AU - Nagase, Masao

AU - Namatsu, Hideo

AU - Kurihara, Kenji

AU - Murase, Katsumi

PY - 1998/12/1

Y1 - 1998/12/1

N2 - A new fabrication method for Si single-electron transistors (SETs) is proposed. The method enables us to fabricate, in a self-aligned way, a twin-island SET in which two Si islands are aligned in parallel. Experimental devices demonstrated, at 40 K, that the twin-island SET structure can be operated as two individual SETs. Since the two SETs are packed in a tiny area, this method is suitable for constructing logic circuits based on pass-transistor-type logic and CMOS-type logic, which promises to lead to single-electron logic LSIs.

AB - A new fabrication method for Si single-electron transistors (SETs) is proposed. The method enables us to fabricate, in a self-aligned way, a twin-island SET in which two Si islands are aligned in parallel. Experimental devices demonstrated, at 40 K, that the twin-island SET structure can be operated as two individual SETs. Since the two SETs are packed in a tiny area, this method is suitable for constructing logic circuits based on pass-transistor-type logic and CMOS-type logic, which promises to lead to single-electron logic LSIs.

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M3 - Conference article

AN - SCOPUS:0032284165

SN - 0163-1918

SP - 123

EP - 126

JO - Technical Digest - International Electron Devices Meeting

JF - Technical Digest - International Electron Devices Meeting

T2 - Proceedings of the 1998 IEEE International Electron Devices Meeting

Y2 - 6 December 1998 through 9 December 1998

ER -

Fabrication method for IC-oriented Si twin-island single-electron transistors

Abstract

ASJC Scopus subject areas

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