Dynamically reconfigurable logic LSI - PCA-1

H. Ito, R. Konishi, H. Nakada, K. Oguri, A. Nagoya, N. Imlig, K. Nagami, T. Shiozawa, M. Inamori

Research output: Contribution to conferencePaper

7 Citations (Scopus)

Abstract

This paper describes the realization of a dynamically reconfigurable logic LSI based on a novel parallel computer architecture. The key point of the architecture is its dual-structured cell array to enable dynamic and autonomous reconfiguration of the logic circuit. The LSI was completed with successfully introducing two specific features: fully asynchronous logic circuits and homogeneous structure using only LUTs.

Original languageEnglish
Pages103-106
Number of pages4
Publication statusPublished - Jan 1 2001
Externally publishedYes
Event2001 VLSI Circuits Symposium - Kyoto, Japan
Duration: Jun 14 2001Jun 16 2001

Other

Other2001 VLSI Circuits Symposium
CountryJapan
CityKyoto
Period6/14/016/16/01

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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  • Cite this

    Ito, H., Konishi, R., Nakada, H., Oguri, K., Nagoya, A., Imlig, N., Nagami, K., Shiozawa, T., & Inamori, M. (2001). Dynamically reconfigurable logic LSI - PCA-1. 103-106. Paper presented at 2001 VLSI Circuits Symposium, Kyoto, Japan.