Inverters using SiC or GaN power devices can achieve high frequency and high efficiency operation. To achieve high efficiency, the switching characteristics of these power devices are important because stray inductances in the main circuit of the inverter have a strong influence on the switching characteristics. To reduce switching loss and surge voltage, minimization of stray inductance in the main circuit is required for a high-frequency PWM inverter. This paper describes design guidelines for high-frequency inverters that achieve low inductance. The PCB design guideline on a thick multilayer PCB is derived from the inductance calculation using 3D-FEA. It is shown experimentally that the stray inductance of the designed PCB can be reduced to the same level as the inductance inside the power devices. Experimental results verify that a prototype can achieve high-speed switching and suppress a surge voltage. A load test is demonstrated to evaluate the main circuit efficiency in a half-bridge inverter at 100 kHz.
|Translated title of the contribution||Design of main circuit for an SiC-MOSFET inverter using a thick copper multilayer PCB to minimize stray inductance|
|Number of pages||10|
|Journal||ieej transactions on industry applications|
|Publication status||Published - 2020|
ASJC Scopus subject areas
- Industrial and Manufacturing Engineering
- Electrical and Electronic Engineering