CMOS floating gate defect detection using IDDQ test with DC power supply superposed by AC component

H. Michinishi, T. Yokohira, T. Okamoto, T. Kobayashi, T. Hondo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

In this paper, we propose a new IDDQ test method for detecting floating gate defects in CMOS ICs. In the method, an unusual increase of the supply current, caused by defects, is promoted by superposing an AC component on the DC power supply. The feasibility of the test is examined by some experiments on four DUTs with an intentionally caused defect. The results showed that our method could detect clearly all the defects, one of which may be detected by neither any functional logic test nor any conventional IDDQ test.

Original languageEnglish
Title of host publicationProceedings of the 11th Asian Test Symposium, ATS 2002
PublisherIEEE Computer Society
Pages417-422
Number of pages6
ISBN (Electronic)0769518257, 0769518257
DOIs
Publication statusPublished - 2002
Event11th Asian Test Symposium, ATS 2002 - Guam, United States
Duration: Nov 18 2002Nov 20 2002

Publication series

NameProceedings of the Asian Test Symposium
Volume2002-January
ISSN (Print)1081-7735

Other

Other11th Asian Test Symposium, ATS 2002
Country/TerritoryUnited States
CityGuam
Period11/18/0211/20/02

Keywords

  • CMOS logic circuits
  • Current supplies
  • Electronic equipment testing
  • Electronics industry
  • Gas detectors
  • Inverters
  • Logic testing
  • Power engineering and energy
  • Power supplies
  • Voltage

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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