Binary field multiplication on ARMv8

Hwajeong Seo, Zhe Liu, Yasuyuki Nogami, Jongseok Choi, Howon Kim

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

In this paper, we show efficient implementations of binary field multiplication over ARMv8. We exploit an advanced 64-bit polynomial multiplication (PMULL) supported by ARMv8 and conduct multiple levels of asymptotically faster Karatsuba multiplication for polynomial multiplication. Finally, our method completed binary field multiplication within 57 and 153 clock cycles for B-251 and B-571 cases, respectively. Proposed method improves the speed-performance by a factor of 4.5 times than previous techniques on same target platform.

Original languageEnglish
JournalSecurity and Communication Networks
DOIs
Publication statusAccepted/In press - 2016

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Polynomials
Clocks

Keywords

  • ARMv8
  • Binary field multiplication
  • Elliptic curve cryptography
  • Karatsuba multiplication
  • Polynomial multiplication

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Information Systems

Cite this

Binary field multiplication on ARMv8. / Seo, Hwajeong; Liu, Zhe; Nogami, Yasuyuki; Choi, Jongseok; Kim, Howon.

In: Security and Communication Networks, 2016.

Research output: Contribution to journalArticle

Seo, Hwajeong ; Liu, Zhe ; Nogami, Yasuyuki ; Choi, Jongseok ; Kim, Howon. / Binary field multiplication on ARMv8. In: Security and Communication Networks. 2016.
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