Asynchronous optical bus for optical VLSIs

Takumi Fujimori, Minoru Watanabe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Recently, optically reconfigurable gate arrays consisting of a holographic memory, a laser array, and an optically reconfigurable gate array VLSI have been under development as high-speed dynamic reconfigurable devices. High-speed dynamic reconfiguration of optically reconfigurable gate arrays can be achieved using a two-dimensional optical bus. If such high-speed reconfiguration were feasible, then its programmable gate array performance could be increased dramatically. This paper presents a demonstration of high-speed asynchronous optical dynamic reconfiguration based on an optically reconfigurable gate array VLSI. The reconfiguration speed of the optically reconfigurable gate array can reach 206.44 Gbit/s.

Original languageEnglish
Title of host publication7th International Conference on Innovative Computing Technology, INTECH 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages162-166
Number of pages5
ISBN (Electronic)9781509039883
DOIs
Publication statusPublished - Nov 8 2017
Externally publishedYes
Event7th International Conference on Innovative Computing Technology, INTECH 2017 - Luton, United Kingdom
Duration: Aug 16 2017Aug 18 2017

Publication series

Name7th International Conference on Innovative Computing Technology, INTECH 2017

Conference

Conference7th International Conference on Innovative Computing Technology, INTECH 2017
Country/TerritoryUnited Kingdom
CityLuton
Period8/16/178/18/17

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Computer Science Applications

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