Abstract
This paper proposes an optically differential reconfigurable gate array (ODRGA) with a partial reconfiguration optical system. The ODRGA not only realizes a partial reconfiguration capability; it also reduces the amount of memory required to store reconfiguration contexts while reducing optical reconfiguration power consumption. This paper presents ODRGA-VLSI, which is available for a partial reconfiguration technique. Advantages of reducing the amount of memory and power consumption are estimated theoretically and compared with a conventional optically reconfigurable gate array.
Original language | English |
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Pages (from-to) | 735-738 |
Number of pages | 4 |
Journal | Proceedings of the IEEE International Conference on VLSI Design |
Volume | 17 |
Publication status | Published - 2004 |
Externally published | Yes |
Event | Proceedings - 17th International Conference on VLSI Design, Concurrently with the 3rd International Conference on Embedded Systems Design - Mumbai, India Duration: Jan 5 2004 → Jan 9 2004 |
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering