An optically differential reconfigurable gate array with a partial reconfiguration optical system and its power consumption estimation

Minoru Watanabe, Fuminori Kobayashi

Research output: Contribution to journalConference articlepeer-review

4 Citations (Scopus)

Abstract

This paper proposes an optically differential reconfigurable gate array (ODRGA) with a partial reconfiguration optical system. The ODRGA not only realizes a partial reconfiguration capability; it also reduces the amount of memory required to store reconfiguration contexts while reducing optical reconfiguration power consumption. This paper presents ODRGA-VLSI, which is available for a partial reconfiguration technique. Advantages of reducing the amount of memory and power consumption are estimated theoretically and compared with a conventional optically reconfigurable gate array.

Original languageEnglish
Pages (from-to)735-738
Number of pages4
JournalProceedings of the IEEE International Conference on VLSI Design
Volume17
Publication statusPublished - 2004
Externally publishedYes
EventProceedings - 17th International Conference on VLSI Design, Concurrently with the 3rd International Conference on Embedded Systems Design - Mumbai, India
Duration: Jan 5 2004Jan 9 2004

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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