An optical reconfiguration circuit suitable for Optically Reconfigurante Gate Arrays (ORGAs) is proposed to improve the gate density of ORGAs. The optical reconfiguration circuit works as a receiver circuit and temporary memory for optically-supplied reconfiguration contexts. The circuit is connected for each programming element of the gate array. Reducing the implementation area of optical reconfiguration circuits is very important to improve the gate density because the number of programming elements of the gate array is extremely large. This paper presents an optical reconfiguration circuit reduced to 43% implementation area compared with that of conventional circuits and an ORGA design with the optical reconfiguration circuit using 0.35 μm 3-Metal CMOS technology. In addition, this study presents an evaluation using HSPICE simulation and photodiode characteristics extracted from experimental results.
|Journal||Midwest Symposium on Circuits and Systems|
|Publication status||Published - 2004|
|Event||The 2004 47th Midwest Symposium on Circuits and Systems - Conference Proceedings - Hiroshima, Japan|
Duration: Jul 25 2004 → Jul 28 2004
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering