To date, we have proposed Dynamic Optically Reconfigurable Gate Arrays (DORGAs), the implemented photodiodes of which serve not only as receivers but also as memory. DORGA offers the merit of easily providing a high gate count optically reconfigurable gate array (ORGA) because each reconfiguration circuit consists of only a photodiode and a refresh transistor. However, even though the fast reconfiguration capability has been confirmed as less than 6 ns, such systems have a demerit: their gate arrays can not function during reconfiguration. Consequently, re-configuration and operation of the implemented circuit on a gate array can not be executed in parallel. Because of that fact, the dynamical reconfiguration frequency of DORGA is slow compared to those of ORGAs with latches, flip-flops, or memory. For that reason, this paper proposes a new optical reconfiguration architecture. Using it, the reconfiguration and implemented circuit operation on a gate array are executable in parallel merely by adding a pass transistor. The new design of a 476-gate-count improved DORGA using a standard 0.35 μm three-metal CMOS process technology is also shown.