An efficient implementation method of fractal image compression on dynamically reconfigurable architecture

Hidehisa Nagano, Akihiro Matsuura, Akira Nagoya

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

This paper proposes a method for implementing fractal image compression on dynamically reconfigurable architecture. In the encoding of this compression, metric computations among image blocks are the most time consuming. In our method, processing elements (PEs) configured for each image block perform these computations in a pipeline manner. By configuring PEs, we can reduce the number of adders, which are the main computing elements, by half even in the worst case. This reduction increases the number of PEs that work in parallel. In addition, dynamic reconfigurability of hardware is employed to omit useless metric computations. Experimental results show that the resources for implementing the PEs are reduced to 60 to 70% and the omission of useless metric computations reduces the encoding time to 10 to 55%.

Original languageEnglish
Title of host publicationParallel and Distributed Processing - 11 th IPPS/SPDP 1999 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, Proceedings
EditorsJosé Rolim
PublisherSpringer Verlag
Pages670-678
Number of pages9
ISBN (Print)3540658319, 9783540658313
DOIs
Publication statusPublished - Jan 1 1999
Externally publishedYes
Event13th International Parallel Processing Symposium, IPPS 1999 Held in Conjunction with the 10th Symposium on Parallel and Distributed Processing, SPDP 1999 - San Juan, United States
Duration: Apr 12 1999Apr 16 1999

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume1586
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Other

Other13th International Parallel Processing Symposium, IPPS 1999 Held in Conjunction with the 10th Symposium on Parallel and Distributed Processing, SPDP 1999
CountryUnited States
CitySan Juan
Period4/12/994/16/99

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)

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  • Cite this

    Nagano, H., Matsuura, A., & Nagoya, A. (1999). An efficient implementation method of fractal image compression on dynamically reconfigurable architecture. In J. Rolim (Ed.), Parallel and Distributed Processing - 11 th IPPS/SPDP 1999 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, Proceedings (pp. 670-678). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 1586). Springer Verlag. https://doi.org/10.1007/BFb0097952