An acceleration and optimization method for optical reconfiguration

Minoru Watanabe, Naoki Yamaguchi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Optically Reconfigurable Gate Arrays (ORGAs), by exploiting the large storage capacity of holographic memory, offer the possibility of providing a virtual gate count that is much larger than those of currently available VLSI circuits. Because circuits implemented on a gate array must often be changed using virtual circuits stored in a holographic memory, rapid reconfiguration is necessary to reduce the reconfiguration overhead. A simple means to realize a short reconfiguration time in ORGAs is to implement a high-power laser array. However, such an array presents the disadvantages of high power consumption, large implementation space, high cost, and so on. Therefore, this paper presents an acceleration method to increase ORGAs' reconfiguration frequency without the necessity for any increase of laser power. This technique also includes optimization between the number of reconfiguration contexts and the reconfiguration frequency. The description in this paper clarifies the advantages using simulation and experimental results.

Original languageEnglish
Title of host publicationProceedings - 21st International Conference on VLSI Design, VLSI DESIGN 2008
Pages607-612
Number of pages6
DOIs
Publication statusPublished - 2008
Externally publishedYes
Event21st International Conference on VLSI Design, VLSI DESIGN 2008 - Hyderabad, India
Duration: Jan 4 2008Jan 8 2008

Publication series

NameProceedings of the IEEE International Frequency Control Symposium and Exposition

Conference

Conference21st International Conference on VLSI Design, VLSI DESIGN 2008
Country/TerritoryIndia
CityHyderabad
Period1/4/081/8/08

ASJC Scopus subject areas

  • Engineering(all)

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