A zero-overhead dynamic optically reconfigurable gate array

Minoru Watanabe, Fuminori Kobayashi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

This paper presents a zero-overhead Dynamic Optically Reconfigurable Gate Array (DORGA) that uses the load capacitance of gates to construct a gate array to maintain its state during optical reconfiguration, and uses junction capacitance of photodiodes as configuration memory. It improves a reconfiguration overhead problem of the previously proposed DORGA. The reconfiguration procedure is executable without the overhead of optical reconfiguration by reducing the dispersion delay between optical reconfiguration circuits. This paper presents the design of 1,632 gate count zero-overhead DORGAs reduced the dispersion delay using a standard 0.35 μn threemetal CMOS process technology.

Original languageEnglish
Title of host publicationProceedings - 2005 IEEE International Conference on Field Programmable Technology
Pages297-298
Number of pages2
DOIs
Publication statusPublished - 2005
Externally publishedYes
Event2005 IEEE International Conference on Field Programmable Technology - , Singapore
Duration: Dec 11 2005Dec 14 2005

Publication series

NameProceedings - 2005 IEEE International Conference on Field Programmable Technology
Volume2005

Conference

Conference2005 IEEE International Conference on Field Programmable Technology
Country/TerritorySingapore
Period12/11/0512/14/05

ASJC Scopus subject areas

  • Engineering(all)

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