A sixteen-context dynamic optically reconfigurable gate array

Mao Nakajima, Minoru Watanabe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

Demand for fast dynamic reconfiguration has increased since dynamic reconfiguration can accelerate the performance of implementation circuits on a programmable device. Such dynamic reconfiguration necessitates two important features: fast reconfiguration and numerous contexts. However, because fast reconfiguration and numerous contexts share a tradeoff relation on current VLSIs, optically reconfigurable gate arrays (ORGAs) have been developed to resolve this dilemma. ORGAs can realize a large virtual gate count that is much larger than those of current VLSI chips by exploiting the large storage capacity of a holographic memory. Furthermore, ORGAs can realize fast reconfiguration through use of large bandwidth optical connections between a holographic memory and a programmable gate array VLSI. Among such developments, we have been developing dynamic optically reconfigurable gate arrays (DOR-GAs) that realize a high gate density VLSI using a photodiode memory architecture. This paper presents the first demonstration of a 16-context DORGA architecture. Furthermore, we present experimental results: 530-833 ns reconfiguration times and 5-9.375 μs retention times.

Original languageEnglish
Title of host publicationProceedings - 2009 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009
Pages120-125
Number of pages6
DOIs
Publication statusPublished - 2009
Externally publishedYes
Event2009 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009 - San Francisco, CA, United States
Duration: Jul 29 2009Aug 1 2009

Publication series

NameProceedings - 2009 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009

Conference

Conference2009 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009
Country/TerritoryUnited States
CitySan Francisco, CA
Period7/29/098/1/09

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering

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