TY - GEN
T1 - A sixteen-context dynamic optically reconfigurable gate array
AU - Nakajima, Mao
AU - Watanabe, Minoru
PY - 2009
Y1 - 2009
N2 - Demand for fast dynamic reconfiguration has increased since dynamic reconfiguration can accelerate the performance of implementation circuits on a programmable device. Such dynamic reconfiguration necessitates two important features: fast reconfiguration and numerous contexts. However, because fast reconfiguration and numerous contexts share a tradeoff relation on current VLSIs, optically reconfigurable gate arrays (ORGAs) have been developed to resolve this dilemma. ORGAs can realize a large virtual gate count that is much larger than those of current VLSI chips by exploiting the large storage capacity of a holographic memory. Furthermore, ORGAs can realize fast reconfiguration through use of large bandwidth optical connections between a holographic memory and a programmable gate array VLSI. Among such developments, we have been developing dynamic optically reconfigurable gate arrays (DOR-GAs) that realize a high gate density VLSI using a photodiode memory architecture. This paper presents the first demonstration of a 16-context DORGA architecture. Furthermore, we present experimental results: 530-833 ns reconfiguration times and 5-9.375 μs retention times.
AB - Demand for fast dynamic reconfiguration has increased since dynamic reconfiguration can accelerate the performance of implementation circuits on a programmable device. Such dynamic reconfiguration necessitates two important features: fast reconfiguration and numerous contexts. However, because fast reconfiguration and numerous contexts share a tradeoff relation on current VLSIs, optically reconfigurable gate arrays (ORGAs) have been developed to resolve this dilemma. ORGAs can realize a large virtual gate count that is much larger than those of current VLSI chips by exploiting the large storage capacity of a holographic memory. Furthermore, ORGAs can realize fast reconfiguration through use of large bandwidth optical connections between a holographic memory and a programmable gate array VLSI. Among such developments, we have been developing dynamic optically reconfigurable gate arrays (DOR-GAs) that realize a high gate density VLSI using a photodiode memory architecture. This paper presents the first demonstration of a 16-context DORGA architecture. Furthermore, we present experimental results: 530-833 ns reconfiguration times and 5-9.375 μs retention times.
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U2 - 10.1109/AHS.2009.64
DO - 10.1109/AHS.2009.64
M3 - Conference contribution
AN - SCOPUS:72849137959
SN - 9780769537146
T3 - Proceedings - 2009 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009
SP - 120
EP - 125
BT - Proceedings - 2009 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009
T2 - 2009 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009
Y2 - 29 July 2009 through 1 August 2009
ER -