A Si memory device composed of a one-dimensional metal-oxide-semiconductor field-effect-transistor switch and a single-electron-transistor detector

Yasuo Takahashi, Akira Fujiwara, Kenji Yamazaki, Hideo Namatsu, Kenji Kurihara, Katsumi Murase

Research output: Contribution to journalArticle

19 Citations (Scopus)

Abstract

A novel Si memory device composed of a small one-dimensional (1D) Si-wire metal-oxide-semiconductor (MOS) field-effect transistor (FET) and a single-electron transistor (SET) is proposed, and its fundamental characteristics at 40 K are demonstrated. The small Si SET is fabricated by means of pattern-dependent oxidation (PADOX), which is almost completely compatible with Si MOSLSI processes. The 1D MOSFET provides a very steep subthreshold slope that is very close to the physical limit at room temperature in spite of the very short channel. This guarantees low voltage operation as well as small size. The memory device uses a 1D MOSFET as a switch for electrons transported to and from the memory node. The very small number of stored electrons is detected by a highly sensitive SET electrometer. The device can operate with an extremely small number of electrons, which assures ultralow-power and high-speed operation.

Original languageEnglish
Pages (from-to)2457-2461
Number of pages5
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Volume38
Issue number4 B
Publication statusPublished - Dec 1 1999

Keywords

  • Coulomb blockade
  • MOSFET
  • Memory
  • One-dimensional wire
  • Single electron
  • Subthreshold slope

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

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