A reconfiguration speed adjustment technique for ORGAs with a holographic memory

Minoru Watanabe, Fuminori Kobayashi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Optically reconfigurable gate arrays (ORGAs), which consist of a gate array VLSI, a holographic memory, and a laser diode array, are a type of programmable gate array. The gate array of ORGAs is optically reconfigured using diffraction patterns from a holographic memory that is addressed by a laser diode array. In previously proposed ORGAs, the optical reconfiguration speed has been designed to be constant by assuming a worst-case reconfiguration speed. However, the diffraction efficiency of a holographic memory varies depending on the pattern of reconfiguration contexts that is recorded in it. Therefore, this paper proposes a reconfiguration speed adjustment technique for ORGAs to accelerate the reconfiguration speed. In addition, the advantages are discussed from some simulation results of a holographic memory and the experimental results of a fabricated gate array VLSI.

Original languageEnglish
Title of host publicationProceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL
Pages917-922
Number of pages6
DOIs
Publication statusPublished - 2006
Externally publishedYes
Event2006 International Conference on Field Programmable Logic and Applications, FPL - Madrid, Spain
Duration: Aug 28 2006Aug 30 2006

Publication series

NameProceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL

Conference

Conference2006 International Conference on Field Programmable Logic and Applications, FPL
Country/TerritorySpain
CityMadrid
Period8/28/068/30/06

ASJC Scopus subject areas

  • Computational Theory and Mathematics
  • Electrical and Electronic Engineering

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