A neural-greedy combination algorithm for board-level routing in FPGA-based logic emulation systems

Research output: Contribution to journalArticle

1 Citation (Scopus)
Original languageEnglish
Pages (from-to)866-872
Number of pages7
JournalIEICE Transactions on Fundamentals
VolumeE81-A
Issue number5
Publication statusPublished - 1998

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