A neural-greedy combination algorithm for board-level routing in FPGA-based logic emulation systems

Research output: Contribution to journalArticle

1 Citation (Scopus)
Original languageEnglish
Pages (from-to)866-872
Number of pages7
JournalIEICE Transactions on Fundamentals
VolumeE81-A
Issue number5
Publication statusPublished - 1998

Cite this

@article{4e5e2dd3090645bebbb819290a393fe0,
title = "A neural-greedy combination algorithm for board-level routing in FPGA-based logic emulation systems",
author = "Nobuo Funabiki",
year = "1998",
language = "English",
volume = "E81-A",
pages = "866--872",
journal = "IEICE Transactions on Fundamentals",
number = "5",

}

TY - JOUR

T1 - A neural-greedy combination algorithm for board-level routing in FPGA-based logic emulation systems

AU - Funabiki, Nobuo

PY - 1998

Y1 - 1998

M3 - Article

VL - E81-A

SP - 866

EP - 872

JO - IEICE Transactions on Fundamentals

JF - IEICE Transactions on Fundamentals

IS - 5

ER -