A double or triple module redundancy model exploiting dynamic reconfigurations

Kouji Shinohara, Minoru Watanabe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

14 Citations (Scopus)

Abstract

Majority voting is a commonly used approach to increase system reliability. Standard triple-module-redundancy (TMR) methods are frequently used in space applications. Using these methods, triple modules and voting circuits are implemented onto an Application Specific Integrated Circuit (ASIC) or an FPGA. When a single event upset occurs, the voting circuit neglects the failure value of a module receiving the single event upset and takes a correct value of the other two modules not receiving it. However, the triple-module implementation requires a large implementation area on VLSIs. Therefore, to reduce the area of TMR implementation, this paper presents a novel double or triple module redundancy (DTMR) method for dynamically reconfigurable devices using a design example of a state machine. Furthermore, this paper presents experimental results of the method using a highly reliable optically reconfigurable gate array.

Original languageEnglish
Title of host publicationProceedings of the 2008 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2008
Pages114-121
Number of pages8
DOIs
Publication statusPublished - 2008
Externally publishedYes
Event2008 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2008 - Noordwijk, Netherlands
Duration: Jun 22 2008Jun 25 2008

Publication series

NameProceedings of the 2008 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2008

Conference

Conference2008 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2008
Country/TerritoryNetherlands
CityNoordwijk
Period6/22/086/25/08

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering

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