A 140 GHz area-and-power-efficient VCO using frequency doubler in 65nm CMOS

Yoshitaka Otsuki, Daisuke Yamazaki, Nguyen Ngoc Mai Khanh, Tetsuya Iizuka

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

This paper presents a compact, low-phase-noise and low-power D-band VCO with the tuning range from 140.1 to 143.5 GHz. To improve the area and power efficiency, we avoid using signal amplification and matching circuits in the VCO, where a 70GHz LC oscillator is directly coupled to a frequency doubler. The layout of the transistors is optimized so that the signal loss and reflection are minimized. The proposed VCO fabricated in a 65 nm CMOS technology occupies the core area of 0.05mm2. It achieves the output power of -8 dBm and the phase noise of -108.2 dBc/Hz at 10MHz offset with the power consumption of 24mW from 1V supply, which leads to the figure-of-merit (FoM) of -177.4 dBc/Hz.

Original languageEnglish
Article number20190051
JournalIEICE Electronics Express
Volume16
Issue number6
DOIs
Publication statusPublished - Jan 1 2019
Externally publishedYes

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Keywords

  • CMOs
  • D-band
  • Frequency doubler
  • Millimeterwave silicon rfics
  • Voltage-controlled oscillator (VCO)

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

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