0.18 μm CMOS process photodiode memory

Takayuki Kubota, Minoru Watanabe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Currently, demand for high-speed dynamic reconfiguration of a programmable device is increasing for raising the performance level of such devices. To support high-speed dynamic reconfiguration, optically reconfigurable gate arrays (ORGAs) have been developed to date. An ORGA consists of a holographic memory, a laser array, and an optically reconfigurable gate array VLSI. The holographic memory can store many configuration contexts. Moreover, its large-bandwidth optical connection enables high-speed reconfiguration. Nevertheless, in previously proposed ORGA-VLSIs, the static configuration memory to store a single configuration context consumed a large implementation area of the ORGA-VLSIs and prevented the realization of large-gate-count ORGA-VLSIs. Therefore, a 0.18 μιη CMOS process photodiode memory has been newly fabricated to increase the gate density of ORGAs. The photodiode memory uses the junction capacitance of photodiodes as dynamic memory, thereby obviating the static configuration memory.

Original languageEnglish
Title of host publication2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
Pages1464-1467
Number of pages4
DOIs
Publication statusPublished - 2013
Externally publishedYes
Event2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 - Beijing, China
Duration: May 19 2013May 23 2013

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
Country/TerritoryChina
CityBeijing
Period5/19/135/23/13

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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