2線2相式非同期回路用FPGAアーキテクチャ

Research output: Contribution to journalArticle

Original languageJapanese
Pages (from-to)108-116
Number of pages9
Journal電子情報通信学会論文誌 D-I
VolumeJ86-D-I
Issue number2
Publication statusPublished - 2003

Cite this

2線2相式非同期回路用FPGAアーキテクチャ. / Watanabe, Nobuya.

In: 電子情報通信学会論文誌 D-I, Vol. J86-D-I, No. 2, 2003, p. 108-116.

Research output: Contribution to journalArticle

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number = "2",

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