• 302 Citations
  • 8 h-Index
1987 …2018
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Research Output 1987 2018

  • 302 Citations
  • 8 h-Index
  • 42 Article
  • 22 Conference contribution
  • 1 Chapter
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Article
2011

PARTHENONの概要

Nagoya, A., 2011, In : 第17回PARTHENON講習会資料(CD-R). p. 1-10 10 p.

Research output: Contribution to journalArticle

PARTHENONの論理回路最適化プログラムの利用技法

Nagoya, A., 2011, In : 第17回PARTHENON講習会資料(CD-R). p. 1-24 24 p.

Research output: Contribution to journalArticle

2008

PARTHENONの概要

Nagoya, A., 2008, In : 第16回PARTHENON講習会テキスト. (CD-ROM), p. 1-10 10 p.

Research output: Contribution to journalArticle

2007

Network processor for high-speed network and quick programming

Murooka, T., Nagoya, A., Miyazaki, T., Ochi, H. & Nakamura, Y., Feb 2007, In : Journal of Circuits, Systems and Computers. 16, 1, p. 65-79 15 p.

Research output: Contribution to journalArticle

HIgh speed networks
Computer networks
Computer programming
Program processors
Processing

PARTHENONの概要

Nagoya, A., 2007, In : 第15回PARTHENON講習会テキスト. (CD-ROM), p. 1-10 10 p.

Research output: Contribution to journalArticle

PARTHENONの論理回路最適化プログラムの利用技法

Nagoya, A., 2007, In : 第15回PARTHENON講習会テキスト. (CD-ROM), p. 1-24 24 p.

Research output: Contribution to journalArticle

2006

PARTHENONの概要

Nagoya, A., 2006, In : 第14回PARTHENON講習会テキスト. (CD-ROM), p. 1-10 10 p.

Research output: Contribution to journalArticle

PARTHENONの論理回路最適化プログラムの利用技法

Nagoya, A., 2006, In : 第14回PARTHENON講習会テキスト. (CD-ROM), p. 1-24 24 p.

Research output: Contribution to journalArticle

自律再構成可能アーキテクチャPCAの構成手法

Nagoya, A., 2006, In : 電子情報通信学会論文誌 D. J89-D, 6, p. 1110-1119 10 p.

Research output: Contribution to journalArticle

2005

PARTHENONの概要

Nagoya, A., 2005, In : 第12回PARTHENON講習会テキスト. (CD-ROM), p. 1-10 10 p.

Research output: Contribution to journalArticle

PARTHENONの論理回路最適化プログラムの利用技法

Nagoya, A., 2005, In : 第12回PARTHENON講習会テキスト. (CD-ROM), p. 1-24 24 p.

Research output: Contribution to journalArticle

8 Citations (Scopus)

Dynamically reconfigurable logic LSI: PCA-2

Ito, H., Konishi, R., Nakada, H., Tsuboi, H., Okuyama, Y. & Nagoya, A., Aug 2004, In : IEICE Transactions on Information and Systems. E87-D, 8, p. 2011-2020 10 p.

Research output: Contribution to journalArticle

Networks (circuits)
Logic circuits
Hardware
Controllers
Processing

PARTHENONの概要

Nagoya, A., 2004, In : 第12回PARTHENON講習会テキスト. p. 85-96 12 p.

Research output: Contribution to journalArticle

PARTHENONの論理回路最適化プログラムの利用技法

Nagoya, A., 2004, In : 第12回PARTHENON講習会テキスト. p. 97-122 26 p.

Research output: Contribution to journalArticle

2003
Reconfigurable architectures
Reconfigurable Architectures
Asynchronous Circuits
Object-oriented
Plastics

Dynamically Reconfigurable Logic LSI designed as Fully Asynchronous System - PCA-2

Nagoya, A., 2003, In : Proc. of COOL Chips VI. p. 84-84 1 p.

Research output: Contribution to journalArticle

8 Citations (Scopus)

Dynamically Reconfigurable Logic LSI - PCA-1: The First Realization of the Plastic Cell Architecture

Ito, H., Konishi, R., Nakada, H., Oguri, K., Inamori, M. & Nagoya, A., May 2003, In : IEICE Transactions on Information and Systems. E86-D, 5, p. 859-867 9 p.

Research output: Contribution to journalArticle

Logic circuits
Plastics
Computer architecture

PARTHENONの概要

Nagoya, A., 2003, In : 第11回PARTHENON講習会テキスト. p. 129-140 12 p.

Research output: Contribution to journalArticle

reconfigurable hardware
Reconfigurable hardware
problem solving
Field programmable gate arrays (FPGA)
field-programmable gate arrays
2002
3 Citations (Scopus)

A method of mapping finite state machine into PCA plastic parts

Inamori, M., Nakada, H., Konishi, R., Nagoya, A. & Oguri, K., Apr 2002, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E85-A, 4, p. 804-810 7 p.

Research output: Contribution to journalArticle

Plastic parts
Finite automata
State Machine
Plastics
Cell

A new notion for functional flexibility: A summary

Yamashita, S., Sawada, H. & Nagoya, A., 2002, In : IEEE Circuits and Systems Magazine. 2, 2, p. 52-54 3 p.

Research output: Contribution to journalArticle

Networks (circuits)

PARTHENONの概要

Nagoya, A., 2002, In : 第10回PARTHENON講習会テキスト. p. 3-14 12 p.

Research output: Contribution to journalArticle

“SPFD: A New Method to Express Functional Flexibility”

Yamashita, S., Sawada, H. & Nagoya, A., 2002, In : IEEE Circuits and Systems Magazine. 2, 2, p. 53 1 p.

Research output: Contribution to journalArticle

Networks (circuits)
2001

A general framework to use various decomposition methods for LUT network synthesis

Yamashita, S., Sawada, H. & Nagoya, A., Nov 2001, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E84-A, 11, p. 2915-2922 8 p.

Research output: Contribution to journalArticle

Look-up Table
Decomposition Method
Synthesis
Decomposition
Decompose
Fractal Image Compression
Reconfigurable hardware
Reconfigurable Hardware
Image compression
Accelerator
32 Citations (Scopus)

Solving satisfiability problems using reconfigurable computing

Suyama, T., Yokoo, M., Sawada, H. & Nagoya, A., Feb 2001, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 9, 1, p. 109-116 8 p.

Research output: Contribution to journalArticle

Logic circuits
Field programmable gate arrays (FPGA)
Clocks
Constraint satisfaction problems
2000
3 Citations (Scopus)

Concept of the Plastic Cell Architecture (PCA)

Nagoya, A. & Oguri, K., 2000, In : NTT R and D. 49, 9, p. 513-517 5 p.

Research output: Contribution to journalArticle

Plastics
Reconfigurable architectures

Efficient kernel generation based on implicit cube set representations and its applications

Sawada, H., Yamashita, S. & Nagoya, A., Dec 2000, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E83-A, 12, p. 2513-2519 7 p.

Research output: Contribution to journalArticle

Regular hexahedron
kernel
Divisor
Logic
Networks (circuits)
1 Citation (Scopus)

Logic synthesis and optimization methods for Sea-of-LUTs based PCA

Nagoya, A., Yamashita, S., Inamori, M. & Sawada, H., 2000, In : NTT R and D. 49, 9, p. 537-545 9 p.

Research output: Contribution to journalArticle

Plastic parts
Plastics
Reconfigurable architectures
Sequential circuits
Combinatorial circuits
37 Citations (Scopus)

SPFD: a new method to express functional flexibility

Yamashita, S., Sawada, H. & Nagoya, A., Aug 2000, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 19, 8, p. 840-849 10 p.

Research output: Contribution to journalArticle

Networks (circuits)
1999
2 Citations (Scopus)
Parallel processing systems
Processing
Hardware
Communication
1998
2 Citations (Scopus)

An efficient method for finding an optimal bi-decomposition

Yamashita, S., Sawada, H. & Nagoya, A., 1998, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E81-A, 12, p. 2529-2537 9 p.

Research output: Contribution to journalArticle

Decomposition
Decompose
Logic
Look-up Table
Form
1 Citation (Scopus)
Data flow graphs
Discrete cosine transforms
Fast Fourier transforms
Elimination
Signal processing

Restructuring logic representations with simple disjunctive decompositions

Sawada, H., Yamashita, S. & Nagoya, A., 1998, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E81-A, 12, p. 2538-2544 7 p.

Research output: Contribution to journalArticle

Logic
Decomposition
Decompose
Logic circuits
Experiment
1997
8 Citations (Scopus)

A hierarchical clustering method for the multiple constant multiplication problem

Matsuura, A., Yukishita, M. & Nagoya, A., 1997, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E80-A, 10, p. 1767-1773 7 p.

Research output: Contribution to journalArticle

Discrete cosine transforms
Hierarchical Clustering
Digital filters
Clustering Methods
Multiplication

Design automation technologies for realizing novel concurrent architecture

Nagoya, A., 1997, In : NTT R and D. 46, 2, p. 153-158 6 p.

Research output: Contribution to journalArticle

Automation
5 Citations (Scopus)

Logic synthesis for look-up table based fpgas using functional decomposition and boolean resubstitution

Sawada, H., Suyama, T. & Nagoya, A., 1997, In : IEICE Transactions on Information and Systems. E80-D, 10, p. 1017-1023 7 p.

Research output: Contribution to journalArticle

Decomposition
Logic Synthesis
Field programmable gate arrays (FPGA)
Networks (circuits)
1987
1 Citation (Scopus)

DIPS-11/5E SERIES MAINFRAMES.

Shiokawa, S., Obashi, Y. & Nagoya, A., Nov 1987, In : Reports of the Electrical Communication Laboratory. 35, 6, p. 633-641 9 p.

Research output: Contribution to journalArticle

Data communication systems
Optical fibers
Data storage equipment
Costs

DIPS-11/5E SERIES PROCESSOR.

Shiokawa, S., Matsumoto, A., Nagoya, A. & Tajiri, K., 1987, In : Denki Tsushin Kenkyujo kenkyu jitsuyoka hokoku. 36, 1, p. 57-65 9 p.

Research output: Contribution to journalArticle

Hardware
Computer hardware
Program processors
Electric power utilization
Virtual machine