• 305 Citations
  • 8 h-Index
1987 …2018

Research output per year

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Research Output

Conference contribution

An efficient framework of using various decomposition methods to synthesize LUT networks and its evaluation

Yamashita, S., Sawada, H. & Nagoya, A., Dec 1 2000, Proceedings of the 2000 Asia and South Pacific Design Automation Conference, ASP-DAC 2000. p. 253-258 6 p. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

An efficient implementation method of fractal image compression on dynamically reconfigurable architecture

Nagano, H., Matsuura, A. & Nagoya, A., Jan 1 1999, Parallel and Distributed Processing - 11 th IPPS/SPDP 1999 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, Proceedings. Rolim, J. (ed.). Springer Verlag, p. 670-678 9 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1586).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

An implementation of longest prefix matching for IP router on plastic cell architecture

Shiozawa, T., Imlig, N., Nagami, K., Oguri, K., Nagoya, A. & Nakada, H., 2000, Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing - 10th International Conference, FPL 2000, Proceedings. Hartenstein, R. W. & Grunbacher, H. (eds.). Springer Verlag, p. 805-809 5 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1896).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

A threshold logic-based reconfigurable logic element with a new programming technology

Aoyama, K., Sawada, H., Nagoya, A. & Nakajima, K., Jan 1 2000, Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing - 10th International Conference, FPL 2000, Proceedings. Grunbacher, H. & Hartenstein, R. W. (eds.). Springer Verlag, p. 665-674 10 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1896).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Concept and implementation of run-time resource management system operating on autonomously reconfigurable architecture

Nakane, Y., Nagami, K., Shiozawa, T. & Nagoya, A., Jan 1 2003, Proceedings - 2003 IEEE International Conference on Field-Programmable Technology, FPT 2003. Institute of Electrical and Electronics Engineers Inc., p. 136-143 8 p. 1275741. (Proceedings - 2003 IEEE International Conference on Field-Programmable Technology, FPT 2003).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Formulation of the addition-shift-sequence problem and its complexity

Matsuura, A. & Nagoya, A., 1997, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1350. p. 43-51 9 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1350).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Integrated approach for synthesizing LUT networks

Yamashita, S., Sawada, H. & Nagoya, A., Dec 1 1999, Proceedings of the IEEE Great Lakes Symposium on VLSI. IEEE, p. 136-139 4 p. (Proceedings of the IEEE Great Lakes Symposium on VLSI).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Multi-level logic optimization for large scale ASICs

Nagoya, A., Nakamura, Y., Oguri, K. & Nomura, R., Dec 1 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers. Publ by IEEE, p. 564-567 4 p. (1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Scalable space/time-shared stream-processing on the run-time reconfigurable PCA architecture

Imlig, N., Shiozawa, T., Nagami, K., Nakane, Y., Konishi, R., Ito, H. & Nagoya, A., 2001, Proceedings - 15th International Parallel and Distributed Processing Symposium, IPDPS 2001. Institute of Electrical and Electronics Engineers Inc., p. 1441-1449 9 p. 925127

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Self-reorganising systems on VLSI circuits

Nakada, H., Ito, H., Konishi, R., Nagoya, A., Oguri, K., Shiozawa, T. & Imlig, N., Dec 1 2001, ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings. p. 310-313 4 p. 922234. (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings; vol. 4).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Solving satisfiability problems on FPGAs using experimental unit propagation

Suyama, T., Yokoo, M. & Nagoya, A., 1999, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1713. p. 434-445 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1713).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Solving satisfiability problems on FPGAs using experimental unit propagation heuristic

Suyama, T., Yokoo, M. & Nagoya, A., Jan 1 1999, Parallel and Distributed Processing - 11 th IPPS/SPDP 1999 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, Proceedings. Rolim, J. (ed.). Springer Verlag, p. 709-711 3 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1586).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)
Paper

Dynamically reconfigurable logic LSI - PCA-1

Ito, H., Konishi, R., Nakada, H., Oguri, K., Nagoya, A., Imlig, N., Nagami, K., Shiozawa, T. & Inamori, M., Jan 1 2001, p. 103-106. 4 p.

Research output: Contribution to conferencePaper

7 Citations (Scopus)

Efficient hierarchical clustering method for the multiple constant multiplication problem

Matsuura, A., Yukishita, M. & Nagoya, A., Jan 1 1997, p. 83-88. 6 p.

Research output: Contribution to conferencePaper

3 Citations (Scopus)

Hardware/software codesign method for a general purpose reconfigurable co-processor

Kimura, S., Yukishita, M., Itou, Y., Nagoya, A., Hirao, M. & Watanabe, K., Jan 1 1997, p. 147-151. 5 p.

Research output: Contribution to conferencePaper

2 Citations (Scopus)

LUT-based FPGA technology mapping using permissible functions

Suyama, T., Sawada, H. & Nagoya, A., Jan 1 1996, p. 215-218. 4 p.

Research output: Contribution to conferencePaper

New methods to find optimal non-disjoint bi-decompositions

Yamashita, S., Sawada, H. & Nagoya, A., Dec 1 1998, p. 59-68. 10 p.

Research output: Contribution to conferencePaper

16 Citations (Scopus)