• 305 Citations
  • 8 h-Index
1987 …2018

Research output per year

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Research Output

2018

Acceleration of analysis processing on decentralized performance profiling system using virtual machines

Yamamoto, M., Nakashima, K., Yamauchi, T., Nagoya, A. & Taniguchi, H., Dec 26 2018, Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018. Institute of Electrical and Electronics Engineers Inc., p. 152-158 7 p. 8590889. (Proceedings - 2018 6th International Symposium on Computing and Networking Workshops, CANDARW 2018).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2011

PARTHENONの概要

Nagoya, A., 2011, In : 第17回PARTHENON講習会資料(CD-R). p. 1-10 10 p.

Research output: Contribution to journalArticle

PARTHENONの論理回路最適化プログラムの利用技法

Nagoya, A., 2011, In : 第17回PARTHENON講習会資料(CD-R). p. 1-24 24 p.

Research output: Contribution to journalArticle

2008

PARTHENONの概要

Nagoya, A., 2008, In : 第16回PARTHENON講習会テキスト. (CD-ROM), p. 1-10 10 p.

Research output: Contribution to journalArticle

PARTHENONの論理回路最適化プログラムの利用技法

Nagoya, A., 2008, In : 第16回PARTHENON講習会テキスト. (CD-ROM), p. 1-24 24 p.

Research output: Contribution to journalArticle

2007

Network processor for high-speed network and quick programming

Murooka, T., Nagoya, A., Miyazaki, T., Ochi, H. & Nakamura, Y., Feb 1 2007, In : Journal of Circuits, Systems and Computers. 16, 1, p. 65-79 15 p.

Research output: Contribution to journalArticle

PARTHENONの概要

Nagoya, A., 2007, In : 第15回PARTHENON講習会テキスト. (CD-ROM), p. 1-10 10 p.

Research output: Contribution to journalArticle

PARTHENONの論理回路最適化プログラムの利用技法

Nagoya, A., 2007, In : 第15回PARTHENON講習会テキスト. (CD-ROM), p. 1-24 24 p.

Research output: Contribution to journalArticle

2006

PARTHENONの概要

Nagoya, A., 2006, In : 第14回PARTHENON講習会テキスト. (CD-ROM), p. 1-10 10 p.

Research output: Contribution to journalArticle

PARTHENONの論理回路最適化プログラムの利用技法

Nagoya, A., 2006, In : 第14回PARTHENON講習会テキスト. (CD-ROM), p. 1-24 24 p.

Research output: Contribution to journalArticle

自律再構成可能アーキテクチャPCAの構成手法

Nagoya, A., 2006, In : 電子情報通信学会論文誌 D. J89-D, 6, p. 1110-1119 10 p.

Research output: Contribution to journalArticle

2005

PARTHENONの概要

Nagoya, A., 2005, In : 第12回PARTHENON講習会テキスト. (CD-ROM), p. 1-10 10 p.

Research output: Contribution to journalArticle

PARTHENONの論理回路最適化プログラムの利用技法

Nagoya, A., 2005, In : 第12回PARTHENON講習会テキスト. (CD-ROM), p. 1-24 24 p.

Research output: Contribution to journalArticle

Dynamically reconfigurable logic LSI: PCA-2

Ito, H., Konishi, R., Nakada, H., Tsuboi, H., Okuyama, Y. & Nagoya, A., Aug 2004, In : IEICE Transactions on Information and Systems. E87-D, 8, p. 2011-2020 10 p.

Research output: Contribution to journalArticle

8 Citations (Scopus)

PARTHENONの概要

Nagoya, A., 2004, In : 第12回PARTHENON講習会テキスト. p. 85-96 12 p.

Research output: Contribution to journalArticle

PARTHENONの論理回路最適化プログラムの利用技法

Nagoya, A., 2004, In : 第12回PARTHENON講習会テキスト. p. 97-122 26 p.

Research output: Contribution to journalArticle

2003

Asynchronous bit-serial datapath for object-oriented reconfigurable architecture PCA

Oguri, K., Shibata, Y. & Nagoya, A., 2003, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Omondi, A. & Sedukhin, S. (eds.). Springer Verlag, p. 54-68 15 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 2823).

Research output: Chapter in Book/Report/Conference proceedingChapter

Concept and implementation of run-time resource management system operating on autonomously reconfigurable architecture

Nakane, Y., Nagami, K., Shiozawa, T. & Nagoya, A., Jan 1 2003, Proceedings - 2003 IEEE International Conference on Field-Programmable Technology, FPT 2003. Institute of Electrical and Electronics Engineers Inc., p. 136-143 8 p. 1275741. (Proceedings - 2003 IEEE International Conference on Field-Programmable Technology, FPT 2003).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Dynamically Reconfigurable Logic LSI designed as Fully Asynchronous System - PCA-2

Nagoya, A., 2003, In : Proc. of COOL Chips VI. p. 84-84 1 p.

Research output: Contribution to journalArticle

Dynamically Reconfigurable Logic LSI - PCA-1: The First Realization of the Plastic Cell Architecture

Ito, H., Konishi, R., Nakada, H., Oguri, K., Inamori, M. & Nagoya, A., May 2003, In : IEICE Transactions on Information and Systems. E86-D, 5, p. 859-867 9 p.

Research output: Contribution to journalArticle

8 Citations (Scopus)

PARTHENONの概要

Nagoya, A., 2003, In : 第11回PARTHENON講習会テキスト. p. 129-140 12 p.

Research output: Contribution to journalArticle

Solving satisfiability problems by using reconfigurable hardware

Suyama, T., Yokoo, M., Sawada, H. & Nagoya, A., Mar 1 2003, In : Electronics and Communications in Japan, Part II: Electronics (English translation of Denshi Tsushin Gakkai Ronbunshi). 86, 3, p. 35-46 12 p.

Research output: Contribution to journalArticle

2002

A method of mapping finite state machine into PCA plastic parts

Inamori, M., Nakada, H., Konishi, R., Nagoya, A. & Oguri, K., Apr 2002, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E85-A, 4, p. 804-810 7 p.

Research output: Contribution to journalArticle

3 Citations (Scopus)

A new notion for functional flexibility: A summary

Yamashita, S., Sawada, H. & Nagoya, A., Dec 1 2002, In : IEEE Circuits and Systems Magazine. 2, 2, p. 52-54 3 p.

Research output: Contribution to journalArticle

PARTHENONの概要

Nagoya, A., 2002, In : 第10回PARTHENON講習会テキスト. p. 3-14 12 p.

Research output: Contribution to journalArticle

“SPFD: A New Method to Express Functional Flexibility”

Yamashita, S., Sawada, H. & Nagoya, A., 2002, In : IEEE Circuits and Systems Magazine. 2, 2, p. 53 1 p.

Research output: Contribution to journalArticle

2001

A general framework to use various decomposition methods for LUT network synthesis

Yamashita, S., Sawada, H. & Nagoya, A., Nov 2001, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E84-A, 11, p. 2915-2922 8 p.

Research output: Contribution to journalArticle

Dynamically reconfigurable logic LSI - PCA-1

Ito, H., Konishi, R., Nakada, H., Oguri, K., Nagoya, A., Imlig, N., Nagami, K., Shiozawa, T. & Inamori, M., Jan 1 2001, p. 103-106. 4 p.

Research output: Contribution to conferencePaper

7 Citations (Scopus)

PCA-1: A fully asynchronous, self-reconfigurable LSI

Konishi, R., Ito, H., Nakada, H., Nagoya, A., Oguri, K., Imlig, N., Shiozawa, T., Inamori, M. & Nagami, K., Dec 1 2001, In : Proceedings - International Symposium on Asynchronous Circuits and Systems. p. 54-61 8 p., 914069.

Research output: Contribution to journalConference article

34 Citations (Scopus)

Scalable space/time-shared stream-processing on the run-time reconfigurable PCA architecture

Imlig, N., Shiozawa, T., Nagami, K., Nakane, Y., Konishi, R., Ito, H. & Nagoya, A., 2001, Proceedings - 15th International Parallel and Distributed Processing Symposium, IPDPS 2001. Institute of Electrical and Electronics Engineers Inc., p. 1441-1449 9 p. 925127

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Self-reorganising systems on VLSI circuits

Nakada, H., Ito, H., Konishi, R., Nagoya, A., Oguri, K., Shiozawa, T. & Imlig, N., Jan 1 2001, In : Materials Research Society Symposium - Proceedings. 626, p. IV310-IV313

Research output: Contribution to journalConference article

2 Citations (Scopus)

Self-reorganising systems on VLSI circuits

Nakada, H., Ito, H., Konishi, R., Nagoya, A., Oguri, K., Shiozawa, T. & Imlig, N., Dec 1 2001, ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings. p. 310-313 4 p. 922234. (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings; vol. 4).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Solving satisfiability problems using reconfigurable computing

Suyama, T., Yokoo, M., Sawada, H. & Nagoya, A., Feb 1 2001, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 9, 1, p. 109-116 8 p.

Research output: Contribution to journalArticle

32 Citations (Scopus)
2000

An efficient framework of using various decomposition methods to synthesize LUT networks and its evaluation

Yamashita, S., Sawada, H. & Nagoya, A., Dec 1 2000, Proceedings of the 2000 Asia and South Pacific Design Automation Conference, ASP-DAC 2000. p. 253-258 6 p. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

An implementation of longest prefix matching for IP router on plastic cell architecture

Shiozawa, T., Imlig, N., Nagami, K., Oguri, K., Nagoya, A. & Nakada, H., 2000, Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing - 10th International Conference, FPL 2000, Proceedings. Hartenstein, R. W. & Grunbacher, H. (eds.). Springer Verlag, p. 805-809 5 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1896).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

A threshold logic-based reconfigurable logic element with a new programming technology

Aoyama, K., Sawada, H., Nagoya, A. & Nakajima, K., Jan 1 2000, Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing - 10th International Conference, FPL 2000, Proceedings. Grunbacher, H. & Hartenstein, R. W. (eds.). Springer Verlag, p. 665-674 10 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1896).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Concept of the Plastic Cell Architecture (PCA)

Nagoya, A. & Oguri, K., Jan 1 2000, In : NTT R and D. 49, 9, p. 513-517 5 p.

Research output: Contribution to journalArticle

3 Citations (Scopus)

Efficient kernel generation based on implicit cube set representations and its applications

Sawada, H., Yamashita, S. & Nagoya, A., Dec 1 2000, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E83-A, 12, p. 2513-2519 7 p.

Research output: Contribution to journalArticle

Logic synthesis and optimization methods for Sea-of-LUTs based PCA

Nagoya, A., Yamashita, S., Inamori, M. & Sawada, H., Jan 1 2000, In : NTT R and D. 49, 9, p. 537-545 9 p.

Research output: Contribution to journalArticle

1 Citation (Scopus)

SPFD: a new method to express functional flexibility

Yamashita, S., Sawada, H. & Nagoya, A., Aug 1 2000, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 19, 8, p. 840-849 10 p.

Research output: Contribution to journalArticle

36 Citations (Scopus)
1999

An efficient implementation method of fractal image compression on dynamically reconfigurable architecture

Nagano, H., Matsuura, A. & Nagoya, A., Jan 1 1999, Parallel and Distributed Processing - 11 th IPPS/SPDP 1999 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, Proceedings. Rolim, J. (ed.). Springer Verlag, p. 670-678 9 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1586).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Integrated approach for synthesizing LUT networks

Yamashita, S., Sawada, H. & Nagoya, A., Dec 1 1999, Proceedings of the IEEE Great Lakes Symposium on VLSI. IEEE, p. 136-139 4 p. (Proceedings of the IEEE Great Lakes Symposium on VLSI).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Solving satisfiability problems on FPGAs using experimental unit propagation

Suyama, T., Yokoo, M. & Nagoya, A., 1999, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). Springer Verlag, Vol. 1713. p. 434-445 12 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1713).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Solving satisfiability problems on FPGAs using experimental unit propagation heuristic

Suyama, T., Yokoo, M. & Nagoya, A., Jan 1 1999, Parallel and Distributed Processing - 11 th IPPS/SPDP 1999 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, Proceedings. Rolim, J. (ed.). Springer Verlag, p. 709-711 3 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 1586).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Summation algorithms on constrained reconfigurable meshes

Matsuura, A. & Nagoya, A., Dec 1 1999, In : Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN. p. 400-405 6 p.

Research output: Contribution to journalConference article

2 Citations (Scopus)
1998

An efficient method for finding an optimal bi-decomposition

Yamashita, S., Sawada, H. & Nagoya, A., Jan 1 1998, In : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E81-A, 12, p. 2529-2537 9 p.

Research output: Contribution to journalArticle

2 Citations (Scopus)